The present invention relates to a semiconductor device and a manufacturing method therefor, and relates more particularly to a semiconductor device that has a thin-film structure with a lamination of polycrystalline layers divided into layers, each having a thickness not larger than a predetermined thickness prescribed according to a fail event, or a semiconductor device that has a thin-film structure with a lamination of polycrystalline layers and layers of another material, of which a main component thereof is different from the main component of the polycrystalline layers, for separating these polycrystalline layers from each other, a method of manufacturing this device, a manufacturing device therefor, and a method of determining a film thickness of the polycrystalline layers for preventing a fail event of the semiconductor device.
In recent years, amorphous materials have been used widely for various applications, such as for semiconductor device materials and magnetic materials, by taking advantage of such characteristics as isotropy and uniformity that can be obtained from the amorphous materials. As a material for a semiconductor device, amorphous silicon has been widely used for the purpose of easily obtaining a uniform density of an impurity.
When a silicon thin film has been formed as a polycrystalline silicon layer on the surface of a semiconductor substrate, stress generated within the film is sufficiently low so as to be not higher than a few hundred MPa. After an amorphous film layer has been formed on the surface of the semiconductor substrate, when the amorphous film is exposed to a high temperature higher than the temperature at which a previously-coated amorphous material is crystallized for forming another film made of other material on the film, or for carrying out a heat processing to relax a stress caused by the other layer, or for crystallizing the amorphous material of the film formed, the volume of the film shrinks as the crystallization of the amorphous material progresses, with a result that, in some cases, an extremely large tensile stress reaching 1000 MPa is generated within the film.
Because of failures (such as warp deformation in the wafer, peeling-off between layers, cracks within a layer, etc.) generated within the semiconductor device due to the occurrence of this tensile stress, there has been a case that the reliability of the product was deteriorated seriously. In order to prevent an occurrence of such a defect as described above, a method has been taken that a film having a compressive stress generated within the film or a film having a tensile stress generated within the film is laminated to reduce the total stress, for example as described in the Japanese Patent Unexamined Publication No. JP-A-63-260052.
In relation to the formation of a laminated layer of polycrystalline silicon films in the semiconductor device, there are also other techniques such as described in the Japanese Patent Unexamined Publication No. JP-A-63-29954 and the Japanese Patent Unexamined Publication No. JP-A-3-3326. These techniques provide the techniques for laminating materials of mutually different substances.
However, when an amorphous film is formed on the surface of the semiconductor substrate and the film layer is crystallized to have a polycrystalline layer, the newly grown grain becomes larger as the film thickness is larger and there is a tendency that the proportion of the volume contraction becomes larger. As a result, depending on the thickness of the film formed, the tensile stress generated in the amorphous material layer that has been crystallized becomes larger than the bonding strength between the film layers formed or the strength of the materials of the film layers formed, which may result in a failure such as a peeling off between layers or a crack within a layer.
Further, even if the above-described failure has not occurred in the semiconductor device, a film thickness has become a cause for generating a warp deformation in the wafer which may cause a fault at the time of an exposure, or an increase in the dislocation density following an increase in the strain at a film interface of the amorphous material has caused a deterioration in the electric characteristics within the semiconductor device such as an increase in the electric conductivity or an inter-connection. Thus, it has been necessary to provide a limit to a film thickness at the time of forming films in order to control a stress within a film.
In the specification of the present invention, various defects induced by an increase in the stress generated within the semiconductor device will collectively be referred to as "a fail event of the semiconductor device". An allowable stress level at which none of these fail events will occur may change widely depending on a difference in the process of manufacturing a semiconductor device, a difference in portions of a laminated film which are used for a semiconductor device, physical properties of materials used and a corresponding fail event. Therefore, an allowable stress value at which a fail event of the semiconductor device will not occur will be called a "critical stress value".
When a thickness of a polycrystalline phase film which has been obtained by crystallizing an amorphous phase film is small, the crystal grains become fine and a stress generated is lowered and no defect, described in the foregoing will occur. However, the thin film thickness has limited an allowable current that can flow within the film and also has become a cause for a defect such as an electromigration that is generated by an excess current within the film. Thus, it has been difficult to form a film with an optimum film thickness by using a polycrystalline phase film which was produced by crystallizing an amorphous material layer.